Researchers from the Electrical Engineering Department of IIT Delhi have developed what the institute describes as India’s first working and demonstrable indigenously designed micro-Graphics Processing Unit (micro-GPU) by a university.
The development is aimed at reducing dependence on imported GPU technology and creating affordable graphics and display-processing solutions for embedded applications.
Micro-GPU demonstrated on FPGA
GPUs are widely used in modern computing systems, particularly in areas such as artificial intelligence and machine learning.
According to IIT Delhi, the researchers demonstrated programmable graphics rendering using a custom floating-point GPU engine. The processor was developed entirely in Register Transfer Language (RTL) and implemented on a Spartan-7 Field-Programmable Gate Array (FPGA) platform.
The team said the work represents a step towards developing indigenous graphics-processing hardware in India.
Designed for affordable applications
The micro-GPU architecture has been designed as a scalable and programmable graphics processor intellectual property (IP) that can be used in a range of embedded systems.
Potential applications include industrial control displays, low-cost human-machine interfaces, e-rickshaw dashboard navigation systems, inland-water navigation terminals for small fishing boats and educational e-book readers.
The design can be implemented on Application-Specific Integrated Circuits (ASICs) as well as programmable hardware such as FPGAs.
Plans for a larger graphics processor
IIT Delhi said the research team is now exploring an architecture with 8 to 16 cores using a vector-style graphics processor design.
The roadmap also includes developing an optimised compiler and graphics software toolchain. The researchers eventually plan to build a proof-of-concept version using a 65 nm ASIC process.
The team believes mature semiconductor technologies such as 65 nm could help create cost-effective and practical graphics chips for embedded applications.
Seeking support for commercialisation
The researchers are currently seeking funding for ASIC development, system integration and eventual commercialisation of the technology.
The project was led by MTech students Nammi Akash and Ravi Teja, under the guidance of Professor Jayadeva and Professor Kaushik Saha from IIT Delhi’s Electrical Engineering Department.
The researchers said their goal was to develop a compact but programmable graphics-processing architecture that could work on FPGAs and eventually be manufactured as an ASIC.
They added that indigenous hardware could support affordable digital-access platforms and contribute to reducing the digital divide.
